1. Field of the Invention
The present invention relates to a driving circuit of a display panel and an image display apparatus.
2. Description of the Related Art
As a flat panel display, a PDP (plasma display panel) and an electron beam display apparatus using an electron-emitting device or the like have been known. This kind of image display apparatus is provided with a display panel (a matrix panel) having many display devices arranged in matrix and a driving circuit for driving a display device. Normally, a scan wiring of the display panel is electrically connected to the driving circuit by an FPC (a flexible printed circuit). In such a structure; a voltage drop of the scan wiring caused by impedance of the FPC, a wire resistance, and an on-resistance of a switch of the driving circuit or the like may present a problem. Therefore, a driving circuit disclosed in Japanese Patent Application Laid-Open No. 2004-233620 is provided with a correcting circuit for adjusting an output potential (namely, correcting a voltage drop) on the basis of a current to pass through the FPC.
As a driving system of a matrix panel, a system for driving a plurality of scan wirings at the same time (namely, a multi-line driving) has been known. The multi-line driving has advantages such as improvement of brightness of a screen and a flicker mitigation in an interlace display or the like.
In the circuit structure disclosed in JP-A No. 2004-233620, the inventors of the present invention found that correction of the voltage drop was not carried out normally when performing the multi-line driving. In the case of the multi-line driving, currents of plural lines pass through the correcting circuit and on the basis of the current values thereof, an output potential to each line is adjusted, so that excessive correction, is generated.